Quick, Comprehensive, Repeatable and Precise Backside Sample Preparation Technique for Failure Analysis

Strasbaugh's advanced advanced backside sample preparation technique called Whole Wafer Super ThinningTM (WWST), provides the Failure Analysis community with a revolutionary means of thinning and polishing the backside silicon from a wafer up to 300mm in diameter. Rather than isolate and prepare an individual die, Whole Wafer Super Thinning- via Strasbaugh's nOvation® system- prepares the entire surface of the wafer at once. nOvation Benefits Faster, more accurate, and more repeatable than any die-level sample preparation tool The only system capable of performing Whole Wafer Super Thinning: the thinning and polishing of the backside silicon for Photo and Thermal Emission Microscopy nOvation Applications Whole Wafer Super Thinning is ideally suited for: Backside Photo and Thermal Emission Microscopy of the inter- connect or device layer of a die Products in which the number of layers of interconnect are too dense for visual inspection from the front-side Failure Analysis methods that require silicon to be <150 microns thick Products designed for Flip-Chip packaging in which the surface pattern (bumps) obscure the underlying interconnect Geometries of 0.25 microns or less MEMS and R&D To request more information on Strasbaugh's nOvation System or Whole Wafer Super Thinning, click here.